A number of different filter structures have hitherto been considered for implementing such a filter, particularly for applications where the frequencies of signals that are to be rejected are but a small fraction of the system sampling rate (approx. 1%). When considering the suitability of such structures, a number of aspects of their performance must be considered. To ensure easy and efficient implementation, it is desirable that the filter should have a reasonably regular structure. Also, considering cost factors, it should have a minimum of complexity. It is also a requisite that the member of multiplications be kept to a minimum and it is preferable that the wordlength of multiplier coefficients also be kept to a minimum. There are other performance considerations that lead to a need for increased signal wordlength. Recursive filter structures tend to amplify any quantisation noise which must inveriably occur during the truncation operation that follows any multiplier stage. It is usual to compensate for this amplification by adopting additional bits in the signal wordlength in order to keep filter noise at an acceptable level. The signal amplitudes at internal nodes of the filter must also be considered. A filter with a high effective Q-factor may have signals at internal nodes as much as 40 dB higher in amplitude than the input signal, at certain frequencies, even if the overall gain is unity. Clipping is prevented again by increasing signal wordlength.
By way of example, consider an application requiring the rejection of signals at 50 Hz and 60 Hz by at least 25 dB, rejection of all components at DC, with less than 0.7 dB attenuation of signals or 200 Hz at a system sampling rate of 8 Hz.
A filter comprised of biquadratic sections would be very regular and easy to implement. However, such a filter optimised for best noise and signal growth performance, would include as many as fourteen 9-bit multipliers and six delay elements. This would have a noise amplification of approx. 13 dB with noise gain at internal nodes of 0 dB. The signal wordlength would need to be increased by an additional three bits for filter compensation as aforesaid. It should however be noted that many alternative structures exist. Thus for example, a filter with considerably worse signal growth performance could be implemented using eleven multipliers and five delay elements.